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[Other resourcematrix3x3

Description: 3X3矩阵乘法的VHDL程序实现!对初学者有很大的帮助!-3X3 matrix multiplication VHDL program! For beginners is a great help!
Platform: | Size: 4136 | Author: 温暖感 | Hits:

[VHDL-FPGA-Verilogmatrix3x3

Description: 3X3矩阵乘法的VHDL程序实现!对初学者有很大的帮助!-3X3 matrix multiplication VHDL program! For beginners is a great help!
Platform: | Size: 4096 | Author: 温暖感 | Hits:

[VHDL-FPGA-Verilogfpu

Description: 使用VHDL语言描述的单精度浮点处理器。源代码来自国外网站。可实现单精度浮点数的加减乘运算。-Described in VHDL language using single-precision floating-point processor. Web site source code from abroad. Can be achieved single precision floating point addition and subtraction, multiplication.
Platform: | Size: 16384 | Author: WeimuMa | Hits:

[Communication-Mobilef2

Description: 96位矩阵循环乘法,verilog实现,-96 matrix multiplication cycle, verilog realized,
Platform: | Size: 1024 | Author: 王佳 | Hits:

[Software Engineeringmatrix_multiplier_with_memory

Description: A matrix is a rectangular table of elements,which can be any number or abstract quantities that can be added and multiplied. Matrix multiplication is the operation of multiplying a matrix with a scalar or another matrix, which is simple fuction widely used to solve mathematical question in EECS field.
Platform: | Size: 6388736 | Author: chen-che,wemg | Hits:

[VHDL-FPGA-Verilogcolor_converter_latest.tar

Description: The main purpose of the core is a color transform tasks such as CIE XYZ<->RGB, different RGB<->RGB and RGB<->YCbCr operations. The main part of color conversions from one to another color system concludes in 3x3 matrix multiplication with vector addition. Therefore the present core performs true 3x3 matrix multiplication and vectors addition of the input data stream. In the package ccfactors_pkg.vhd presents matrixes for all of the most popular conversions. You can use these defines or type own factors. Input DATA_WIDTH is changeable and defines by the GENERIC param of the module. Precision of the matrix factors also is changeable. Default precision – 10-E6. Better than enough for color conversion tasks.
Platform: | Size: 338944 | Author: Ning | Hits:

[VHDL-FPGA-Verilogetd-0407109-183702-81-001[1]

Description: 文章介绍了YUV向RGB颜色空间转换的硬件电路实现算法.在高基乘法算法基础上,建立了参数化高基乘法算法模型,并给出了Verilog HDL描述 小数乘法的整数乘法近似和近似误差给予了详细的讨论.采用乘法单元复用的设计结果将在两个时钟周期内完成YUV向RGB的颜色空间转换.-This paper introduces the YUV to RGB color space conversion hardware algorithm. Matrix multiplication algorithm in high-was established based on a parametric model of the high base multiplication algorithm, and gives the Verilog HDL description decimal multiplication and integer multiplication approximation error of approximation give a detailed discussion. using multiplication unit design reuse results will be completed in two clock cycles YUV to RGB color space conversion.
Platform: | Size: 3997696 | Author: jjj | Hits:

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